3.1 Facilitating Program Builds With the make Utility

The make utility applies intelligence to the task of program compilation and linking. Typically, a large application consists of a set of source files and INCLUDE files, requiring linking with a number of libraries. Modifying any one or more of the source files requires recompilation of that part of the program and relinking. You can automate this process by specifying the interdependencies between files that make up the application along with the commands needed to recompile and relink each piece. With these specifications in a file of directives, make ensures that only the files that need recompiling are recompiled and that relinking uses the options and libraries you need to build the executable. The following discussion provides a simple example of how to use make. For a summary, see make(1S).

3.1.1 The Makefile

A file called makefile tells make in a structured manner which source and object files depend on other files. It also defines the commands required to compile and link the files.

For example, suppose you have a program of four source files and the makefile:

demo% ls
makefile
commonblock
computepts.f
pattern.f
startupcore.f
demo%

Assume both pattern.f and computepts.f have an INCLUDE of commonblock, and you wish to compile each.f file and link the three relocatable files, along with a series of libraries, into a program called pattern.

The makefile looks like this:

demo% cat makefile
pattern: pattern.o computepts.o startupcore.o
      f95 pattern.o computepts.o startupcore.o -lcore95 \
      -lcore -lsunwindow -lpixrect -o pattern
pattern.o: pattern.f commonblock
      f95 -c -u pattern.f
computepts.o: computepts.f commonblock
      f95 -c -u computepts.f
startupcore.o: startupcore.f
      f95 -c -u startupcore.f
demo%

The first line of makefile indicates that making pattern depends on pattern.o, computepts.o, and startupcore.o. The next line and its continuations give the command for making pattern from the relocatable.o files and libraries.

Each entry in makefile is a rule expressing a target object’s dependencies and the commands needed to make that object. The structure of a rule is:

target: dependencies-listTAB build-commands

• Dependencies. Each entry starts with a line that names the target file, followed by all the files the target depends on.

• Commands. Each entry has one or more subsequent lines that specify the Bourne shell commands that will build the target file for this entry. Each of these command lines must be indented by a tab character.

3.1.2 make Command

The make command can be invoked with no arguments, simply:

demo% make

The make utility looks for a file named makefile or Makefile in the current directory and takes its instructions from that file.

The make utility:

• Reads makefile to determine all the target files it must process, the files they depend on, and the commands needed to build them.

• Finds the date and time each file was last changed.

• Rebuilds any target file that is older than any of the files it depends on, using the commands from makefile for that target.

3.1.3 Macros

The make utility’s macro facility allows simple, parameterless string substitutions. For example, the list of relocatable files that make up the target program pattern can be expressed as a single macro string, making it easier to change.

A macro string definition has the form:

NAME = string

Use of a macro string is indicated by:

$(NAME)

which is replaced by make with the actual value of the macro string.

This example adds a macro definition naming all the object files to the beginning of makefile:

OBJ = pattern.o computepts.o startupcore.o

Now the macro can be used in both the list of dependencies as well as on the f95 link command for target pattern in makefile:

pattern: $(OBJ)
      f95 $(OBJ) -lcore95 -lcore -lsunwindow \
      -lpixrect -o pattern

For macro strings with single-letter names, the parentheses may be omitted.

3.1.4 Overriding Macro Values

The initial values of make macros can be overridden with command-line options to make. For example:

FFLAGS=–u
OBJ = pattern.o computepts.o startupcore.o
pattern: $(OBJ)
      f95 $(FFLAGS) $(OBJ) -lcore95 -lcore -lsunwindow \
      -lpixrect -o pattern
pattern.o: pattern.f commonblock
      f95 $(FFLAGS) -c pattern.f
computepts.o:
      f95 $(FFLAGS) -c computepts.f

Now a simple make command without arguments uses the value of FFLAGS set above. However, this can be overridden from the command line:

demo% make "FFLAGS=–u -O"

Here, the definition of the FFLAGS macro on the make command line overrides the makefile initialization, and both the -O flag and the -u flag are passed to f95. Note that "FFLAGS=" can also be used on the command to reset the macro to a null string so that it has no effect.

3.1.5 Suffix Rules in make

To make writing a makefile easier, make will use its own default rules depending on the suffix of a target file.

The default rules are in the file /usr/share/lib/make/make.rules. When recognizing default suffix rules, make passes as arguments any flags specified by the FFLAGS macro, the -c flag, and the name of the source file to be compiled. Also, the make.rules file uses the name assigned by the FC macro as the name of the Fortran compiler to be used.

The example below demonstrates this rule twice:

FC = f95
OBJ = pattern.o computepts.o startupcore.o
FFLAGS=–u
pattern: $(OBJ)
      f95 $(OBJ) -lcore95 -lcore -lsunwindow \
      -lpixrect -o pattern
pattern.o: pattern.f commonblock
      f95 $(FFLAGS) -c pattern.f
computepts.o: computepts.f commonblock
startupcore.o: startupcore.f

make uses default rules to compile computepts.f and startupcore.f.

There are default suffix rules for .f90 files that will invoke the f95 compiler.

However, unless you define the FC macro to be f95, the default suffix rules for .f and .F files call f77 and not f95.

Furthermore, there are no suffix rules currently defined for .f95 and .F95 files, and .mod Fortran 95 module files will invoke the Modula compiler. To remedy this requires creating your own local copy of the make.rules file in the directory in which make is called, and modifying the file to add .f95 and .F95 suffix rules, and delete the suffix rules for .mod. See the make(1S) man page for details.

3.1.6 .KEEP_STATE and Special Dependency Checking

Use the special target .KEEP_STATE to check for command dependencies and hidden dependencies.

When the .KEEP_STATE: target is effective, make checks the command for building a target against the state file. If the command has changed since the last make run, make rebuilds the target.

When the .KEEP_STATE: target is effective, make reads reports from cpp(1) and other compilation processors for any "hidden" files, such as #include files. If the target is out of date with respect to any of these files, make rebuilds it.